Integrated Circuit Systems Design

Winter 2010

Prof. Sterian KEN227 steriana@gmail.com 331-6756 |
Prof. Parikh KEN249 parikhc@gvsu.edu 331-7318 |

For installing on 64-bit systems, try running the `bin/nt/setup.exe` program instead of the `setup.exe` program in the main directory of the installation archive.

- Here is Assignment #4. Select your partner (if any) and specific assignment from the choices below, then e-mail Prof. Sterian with your choice (also indicate your partner's name or if you will be working alone). First-come first-choice!
Student / Group Assignment Stewart Billiard Table Simulation Bryan Tone Detector Jeff & Paul Bouncing Ball Simulator Keith Ellipse Generator Eric Oscilloscope Mike Logarithmic Spiral Generator James Polynomial Plotter Scott & Comson Artificial Terrain Generator Nick Lissajous Generator Ben T.& Ryan Function Generator Kyle 3D Image Visualization Derek Bouncing Ball Simulator Ben B. Billiard Table Simulation - Here is Assignment #3. Your individual assignments are as shown below.
Student Assigned Sections Keith 2.6,2.25,2.2,2.8,2.9,3.2 Ben B. 2.6,2.25,2.11,2.33,2.34,2.45,3.3 Comson 2.6,2.25,2.1,2.5,2.7,3.1,2.21,3.5 Jim 2.6,2.25,2.28,2.29,2.41,3.9 Eric 2.6,2.25,2.7,2.27,2.36,2.37,3.4 Derek 2.6,2.25,2.11,2.18,2.43,3.7 Scott 2.6,2.25,2.17,2.32,2.35,3.6 Kyle 2.6,2.25,2.11,2.42,2.46,3.2 Stewart 2.6,2.25,2.15,2.17,2.23,2.44,3.8 Ryan 2.6,2.25.2.4,2.11,2.17,2.29 Mike 2.6,2.25,2.2,2.13,2.17,2.41,3.9 Paul 2.6,2.25,2.14,2.30,2.31,2.50 Ben T. 2.6,2.25,2.5,2.7,2.13,2.28,3.1 Bryan 2.6,2.25,2.20,2.26,2.38 Nick 2.6,2.25,2.10,2.12,2.28,2.39 Jeff 2.6,2.25,2.11,2.14,2.17,2.24,3.5 - Here is Assignment #2. Your individual assignment will be selected in class. Here are the support files you need:
`vgademo1.zip`is the pixel-based demo and also contains the 640x480 VGA timing component`vgademo2.zip`is the character-based demo and also contains the 1kX8 ROM component and sample typeface

- Here is Assignment #1. Your individual assignment will be announced in class.

- Here is the
`sintab2.vhd`VHDL simulation file for wavetable generation using a fractional angle accumulator - Here is the
`sintab.vhd`VHDL simulation file for wavetable generation - Here is Learning Activity #17: CoreGen CORDIC blocks
- Here is Learning Activity #16: Floating-Point Hardware
- Here is Learning Activity #15: Fixed-Point Representations
- Here is Learning Activity #14: Multipliers
- Here is Learning Activity #13: Adders
- Here is Learning Activity #12: CPU timing view. Here is the
`cpu.zip`source for the CPU. - Here is Learning Activity #11: CPU instructions
- Here is Learning Activity #10: CRC's. Here is the
`crc.vhd`implementation and the`crc_tb.vhd`testbench. - Here is Learning Activity #9: LFSR's as divide-by-N counters.
- Here is Learning Activity #8: LFSR's. Here is the
`lfsr.vhd`LFSR implementation and the`lfsr_tb.vhd`test bench for it. - Here is Learning Activity #7: Functions, Procedures, Packages. Here are the
`regcomparator.vhd`registered comparator VHDL source,`simtools.vhd`sample package, and`debouncer_testbench.vhd`for this activity. - Here is Learning Activity #6: StateCAD
- Here is Learning Activity #5: CoreGEN
- Here is Learning Activity #4: Counters
- Here is Learning Activity #3: Buses
- Here is Learning Activity #2: Test benches
- Here is Learning Activity #1: A 4-bit AND gate in VHDL

- The -1200 and -500 variants of the Spartan-3E chip have slightly different pinouts for the LED's. Please see this pinout guide.

- A student reports that the pushbuttons on the Nexys board are labelled in reverse order.
- A student reports the following: the 7-segment display anode designators are incorrect on the leaflet included with the Basys board. The schematic inside the reference manual shows the correct pinout but the anode designators are in disagreement. The leaflet indicates the following: AN3: P34, AN2: P26, AN1: P32, and AN0: P33. The correct pinout is: AN3: P26, AN2: P32, AN1: P33, and AN0: P34. The reference manual shows the proper pinout but the anodes are represented as AN4, AN3, AN2 and AN1.

- Here is an article discussing tradeoffs in direct digital synthesis of periodic functions (e.g., wavetable synthesis).
- The Lattice ORT82G5 SerDes chip can handle 3.7Gbps data streams and has over 300,000 FPGA gates.
- Handel-C is an alternative hardware description language that looks very much like C.

- Ashenden, P.J.,
*Digital Design (VHDL): An Embedded Systems Approach Using VHDL*, Morgan Kaufmann, 2007.

This text is a no-nonsense approach to teaching just enough VHDL to design practical circuits. Ashenden writes a much more complete reference guide for VHDL, but this book is better at getting your hands dirty with real hardware and is recommended prior to studying his reference text.

- Ashenden, P.J.,
*The Designer’s Guide to VHDL*, Morgan Kaufmann Publishers, 1995.

This is a good text that is useful as both introduction and reference to VHDL, although leaning more towards the latter (i.e., it’s not a “quick start” book). It does not address VHDL-for-synthesis as thoroughly as some other books, however, so you may want additional references for purely synthesis issues.

Ashenden also wrote*The Student’s Guide to VHDL*, which is a stripped-down (and cheaper) version of*The Designer’s Guide to VHDL*. I would recommend investing in the full text.

Finally, you can find Ashenden's original VHDL Cookbook online (follow previous link). These were the original notes out of which the above textbook was born.

- Brown, S. and Vranesic, Z.,
*Fundamentals of Digital Logic with VHDL Design*, McGraw Hill, 2000.

This is a junior/senior level textbook that is very similar to Wakerly in coverage but with more emphasis on and examples of VHDL. It also comes with the student version of the Altera MAX+PLUS II software and the textbook examples are directed to this environment. This text is recommended if you like learning from textbooks (i.e., broad, lots of coverage and examples, homework questions, VHDL reference material) rather than more focused texts. This text is also good because of its tight integration with MAX+PLUS II; you can try the examples and tutorials directly on the UP1 board.

- Roth, C.H. Jr.,
*Digital Systems Design Using VHDL*, PWS Publishing, 1997.

This text spends less time on the basics of digital design and VHDL and more time on examining the implementation of algorithms and their design (e.g., multipliers, floating-point arithmetic functions). Also included are fully-explained VHDL models of a UART and the 68HC05 microcontroller. This in-depth treatment of a complex peripheral/microprocessor design is beyond the scope of our course but is extremely relevant to advanced VHDL designs.

- Smith, D.J.,
*HDL Chip Design*, Doone Publications, 2000.

This is slightly unusual text in both size and content. It is bigger than most texts (8.5"x11") but this allows for a bigger more readable font and lots of code to fit on one page. The unusual content comes from the presentation of both VHDL and Verilog code for all examples, side by side. Apart from these, however, the book is a very practically-oriented introduction to VHDL/Verilog for both design, synthesis, and testing. This book is probably closest to the intent of the course. Unfortunately, it is out of print.

- Armstrong, J.R. and Gray, F.G.
*VHDL Design, Representation, and Synthesis*, Prentice-Hall.

This book is a nice introduction to the VHDL language and also pays a fair amount of attention to the process of design with VHDL. The book discusses issues with ASIC design, modeling the effects of timing in actual circuits, etc. The book straddles the fence between language and implementation, in other words, a little bit of Smith and Ashenden, but not as much as each on their own.

- Koren, I.,
*Computer Arithmetic Algorithms*, Brookside, 1998.

This is a good (but terse) book on, as the title says, computer arithmetic algorithms, such as fast addition, multiplication, trigonometric functions, etc. See the author's web page for the book at <http://www.ecs.umass.edu/ece/koren/arith>. The original version is out of print at big bookstores but can be ordered by following links from his web site.

- Ercegovac, M.D. and Lang, T.,
*Digital Arithmetic*, Morgan Kaufmann, 2004.

This is another book on computer arithmetic algorithms, like the Koren text above, but with expanded coverage. For example, it contains an entire chapter on CORDIC whereas Koren contains only a few pages. Be warned, this is an advanced text and I find it very difficult to read.The book's web site is at http://www.cs.ucla.edu/digital_arithmetic.

- Parhami, B.,
*Computer Arithmetic Algorithms and Hardware Designs*, Oxford University Press, 2000.

This is another book on computer arithmetic algorithms, like the texts above. It is terse but extensive. I like it.

- Hamblen, J.O. and Furman, M.D.,
*Rapid Prototyping of Digital Systems*, Kluwer Academic Publishers, 2001.

This text specifically targets the Altera UP1 development board and the Altera MAX+PLUS II software (a CD-ROM with the student version of this software is included). The textbook uses a tutorial approach so there are lots of examples. This book is intended for a quick start to getting things done (it does a good job) but isn’t a thorough description of VHDL or digital design concepts. Note that the Altera UP1 board and MAX+PLUS II are both really out-of-date.

std_logic_1164.vhd |
The IEEE std_logic_1164 library |

Python Fixed-Point Module | A Python module for arbitrary-precision arithmetic with fixed-point numbers, including transcendental functions. Could be useful for prototyping/experimenting with fixed-point numbers before committing to a hardware system design. |

LFSR Application Note | Maxim's Application Note APP1743 on the taps for maximal-length LFSR's correlates well with the presentation on LFSR's in the course notes. |

VHDL Simili Simulator | The VHDL Simili Simulator Version 1.4 from Symphony EDA is an external command-line VHDL simulator. You can get your own free copy from this local link [2.5M]. Note that a more recent version is available from the Symphony EDA web site. Note that versions more recent than Version 1.4 are not free and have various restrictions on operation, etc. etc. Use at your own risk. |

Digital Systems Design course by Bob Reese | Dr. Reese's web site has lots of good links on sample code and tutorials (his class notes, essentially) on VHDL. His graduate-level course on VHDL modelling has more advanced material. |

VHDL Tutorial by Prof. W.H. Glauert | Another on-line tutorial. This uses lots of frames and pop-up windows...it may be annoying. |

VHDL Verification Course by Stefan Doll | A on-line course on verification using VHDL (e.g., test benches). |

VHDL Language Reference Guide | This is a Windows Help File (.HLP) with very comprehensive VHDL reference. I use this a lot when I want a quick refresher on some particular syntax or usage issue. |

VHDL Sources at ETH | This site has sources for the numeric_std, std_logic_1164, mathpack, etc. VHDL packages. It also describes the differences between the old std_logic_arith and the newer numeric_std. |

The comp.lang.vhdl FAQ |
The Frequently Asked Questions (FAQ) from the comp.lang.vhdl
newsgroup has many useful links to software, texts, code fragments,
etc. You can also download a fairly recent version of the FAQ
as 4 PDF files: FAQ1, FAQ2,
FAQ3, FAQ4 (each
less than 250k).
Note that the FAQ has some |

The numeric_std package. |
The IEEE package for working with groups of bits as numbers. This is a
standardized replacement for the std_logic_arith package. |

The MATH_REAL package | A VHDL package with mathematics support functions like sin, cos, random numbers, logarithms, rounding, etc. Also available from this local copy [49k] |

22V10 Data Sheet | The data sheet [320k] for a 22V10, a "classic" FPLD. |