EVBU - An Open Source 68HC11 Simulator

Andrew Sterian
Padnos College of Engineering & Computing
Grand Valley State University

Introduction

Many of the 68HC11 peripherals are emulated in EVBU. While the emulation is fairly accurate, you should not consider EVBU to be a reference implementation of the 68HC11. If you try to do strange things, like use Port A pin 7 as a pulse accumulator input while programming the DDRA7 bit to make this pin an output, you get what you deserve! That is, EVBU may or may not behave like a real 68HC11. If you can suggest improvements for enhancing the accuracy of the emulation, however, I would be glad to hear from you.

The peripherals that are emulated are listed in the sections below, grouped by function. Some functions are implemented in the same Python module, however, so disabling a module (using the --no-timer or --no-pio command-line options) will disable several functions. There is no need to disable modules unless you really want to improve the speed of emulation a little bit. If you really want to speed up emulation, consider rewriting some of the core PySim11 modules in C and send them to me :-)

Timer

Most of the timer functions of the 68HC11 are emulated. This includes:

• The TCNT register
• The prescaler
• Timer overflow flag (TOF) and interrupt (TOI)
• Real-time interrupt flag (RTIF) and interrupt (RTII)
• Real-time interrupt prescaler

The following aspects of the timer system are not yet implemented:

• The COP watchdog
• Prescaler writes are not limited to the first 64 cycles of execution after reset
• Counter bypass in test mode (CBYP)

The timer system is disabled if the --no-timer command-line option is given.

Output Compare

The output compare system is fully emulated. This includes:

• TOC1 through TOC5 output compares
• Output compare flags (OCxF) and interrupts (OCxI)
• Control of port pins (TCTL1 register)
• OC1 control of OC2:OC5 pins (OC1M and OC1D registers)
• Output compare forcing (CFORC register)

The output compare system is disabled if the --no-timer command-line option is given. Control of port pins is disabled if the --no-pio command-line option is given.

Input Capture

The input capture system is fully emulated. This includes:

• IC1 through IC4 input captures
• Input capture flags (ICxF) and interrupts (ICxI)
• Input capture times (TIC1 through TIC4 registers)
• Input capture edge configuration (TCTL2 register)

The input capture system is disabled if the --no-pio command-line option is given. Input capture timings (i.e., TICx registers) are disabled if the --no-timer command-line option is given.

Parallel I/O

Parallel I/O is implemented through the waveform I/O graphical interface. Output pins are graphed in a window that mimics a logic analyzer. Input pins are stimulated using waveforms described by text files. These waveforms also appear in a waveform window.

The parallel I/O emulation assumes the 68HC11 is operating in single-chip mode, so that Ports B and C are available for general-purpose use.

The supported parallel I/O function include:

• All Port A pins, including special functions for input capture and output compare, DDRA3/DDRA7 direction control, and the PORTA register
• All Port B pins
• All Port C pins, including direction control using DDRC
• All Port D pins (pins 0 through 5), including direction control using DDRD
• All Port E pins

Functions not yet supported are:

• Strobed I/O and handshaking (PIOC and PORTCL)
• Open-collector Port C outputs (CWOM)
• Open-collector Port D outputs (DWOM)

The parallel I/O system is disabled if the --no-pio command-line option is given.

Pulse Accumulator

The pulse accumulator system is fully emulated. This includes:

• The PAI input pin on Port A pin 7
• The pulse accumulator counter (PACNT)
• Event counting and gated time accumulation modes (PAMOD)
• Events on rising or falling edges (PEDGE)
• Pulse accumulator input flag (PAIF) and interrupt (PAII)
• Pulse accumulator overflow flag (PAOVF) and interrupt (PAOVI)

The pulse accumulator system is disabled if the --no-pio command-line option is given. The timer module (disabled with --no-timer) maintains the PAIF and PAOVF flags, hence these may be enabled/disabled separately.

Interrupts

Interrupts are emulated by EVBU. All of the supported peripherals that generate interrupts are capable of generating interrupt events if enabled by their local masks and by the I bit in the CCR. Interrupt emulation includes:

• Interrupt vector locations in high memory (can be overwritten, even though BUFFALO ROM normally prevents writing to these locations)
• Secondary interrupt vector table in RAM beginning at 0x00C4 (to compensate for main interrupt vector table being in BUFFALO ROM)
• Interrupts enabled by TMSKx registers and I bit in CCR
• Register stacking and setting of I bit on interrupt
• Interrupt priority resolution, and promotion using the HPRIO register
• SWI generates an interrupt or returns control to BUFFALO (depending on the --use-swi command-line flag)

Interrupt system functions not yet supported are:

• Illegal opcode interrupts
• IRQ and XIRQ
• WAI instruction
• STOP and TEST instructions
• Clock monitor fail
• Reset interrupt

Unsupported Peripherals

The following 68HC11 peripherals are not yet emulated by EVBU:

• The SCI peripheral
• The SPI peripheral
• The A/D peripheral
• On-chip EEPROM (this area behaves as RAM)
• On-chip ROM (this area behaves as RAM)
• Strobes and handshaking (STRA, STRB, PIOC, PORTCL)

For another view of supported and unsupported peripherals, see the next section which provides a register view of peripheral support.

Register Support

This section describes the peripherals emulated by EVBU from a register point of view. In the table below, registers fully emulated have no comments (i.e., have a blank table cell). Registers not supported or fully emulated indicate the bits that are/are not supported.

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